eval - adumqsebz user guide ug - 042 one technology way ? p. o . box 9106 ? norwood, ma 02062 - 9106, u.s.a. ? tel: 781.329.4700 ? fax: 781.461.3113 ? www.analog.com evaluating the 16 - lead soic and the 16 - lead qsop digital isolators please see the last page for an important warning and legal terms and conditions . rev. c | page 1 of 8 features convenient connections for power through screw terminal blocks add - on bnc connector for 50 signal sources on - board signal routing support for signal wrap back simple signal paths to reduce transmission line effects pull - up and pull - down provided for control lines support for iso power project area that supports surface - mount and through - hole devices general description the e va l - adumqsebz can be used with most i coupler? isolation products in the 16 - lead, wide - body soic and qsop packages. the evaluation board supports the common pad positions for power, ground, and input/output pins found in nearly all of the i coupl er products and is a configurable board that can be adapted to many i coupler products. supported i coupler models adum130x adum131 x adum140x adum141x adum1510 adum240x adum330x adum340x adum344x adum5000 adum520x adum 540x adum6000 adum620x adum640x adum744x adum7510 evaluation board figure 1. 08414-001
UG-042 eval-adumqsebz user guide rev. c | page 2 of 8 table of contents features .............................................................................................. 1 ? general description ......................................................................... 1 ? supported i coupler models ............................................................ 1 ? evaluation board .............................................................................. 1 ? revision history ............................................................................... 2 ? evaluation board hardware ............................................................ 3 ? pad layout for the device under test (dut) .......................... 3 ? terminals ........................................................................................3 ? data input/output connections .................................................5 ? design area ....................................................................................5 ? evaluation board schematic and layout .......................................6 ? ordering information .......................................................................8 ? bill of materials ..............................................................................8 ? revision history 11/2016rev. b to rev. c changes to supported i coupler models section ......................... 1 10/2015rev. a to rev. b changes to supported i coupler models section ......................... 1 12/2010rev. 0 to rev. a changes to supported i coupler models section ......................... 1 1/2010revision 0: initial version
eval - adumqsebz user guide ug- 042 rev. c | page 3 of 8 evaluation board har dware pad layout for the device under test ( dut ) the evaluation board has a pad layout in u2 a that accommodates 16- lead, wide - body soic devices, as well as qsop miniature packages, as shown in figure 2 . power and ground connections connect to capacitor pads for side 1 and side 2. figure 2 . dut pad layout component u2a three low inductance, surface - mount bypass capacitors are provided for each side. a 100 nf capacitor is installed on each side in capacitor c2 and capacitor c3. additional bypass capacitors are required for qsop packages and are below the qsop pads and wit hin the pad layout of the soic package. however, t hey cannot be installed if the soic is in use. in addition, there are 10 f ceramic , x7r capacitors, c1 on side 1 and c4 on side 2, that provide high frequency bypassing and ripple reduction. for further ri pple reduction in iso power? devices like the adum540x , tantalum ca pacitors are added to c10 as a 68 f value on side 1 and to c5 as a 22 f value on side 2. these large value ceramic an d tantalum bypass capacitors are not necessary for non - iso power devices. many of the i coupler devices have configuration pins that allow outputs to be disabled or default levels to be set. these pins are usually located at pin 7 and pin 10 in the wide bod y package. pull - up 0 resistors on sm pad r4 and sm pad r17 pull these pins high. these pull - up resistors can be removed, and pull - down resistors can be installed on r5 and r18. in addition to the u2 a dut space, an additional pad layout is provided at u1, specifically to accommodate an adum5000 iso power device, as shown in figure 3 , which is a power supply only d evice that can provide secondary power for any i coupler in standalone mode or a slave to boost power to the adum520x or adum540x devices. the surface - mount resistor pads that control these functions are not populated. an adum5000 is not installed at position u1; it is left to the user to obtain and install this device , if required. as shown in figure 3 , the power and ground c onnections for this device are different from the rest of the i coupler components. the c6 to c9 pad positions for bypass capacitors are provided but not populated (0.1 f , x7r , ceramic capacitors are recommended). pull - up, pull - down, and connecting resisto r pads are provided (but not populated) to connect the adum5000 in master or slave mode, as well as to set the output voltage. see the adum5000 data sheet for descriptions of the pin functions. figure 3. adum5000 pad layout component u1 grounding scheme the evaluation board consists of two separate ground and power systems. each side of the dut can operate from an independent power and ground reference , which allows simulation of conditions similar to the target application. the evalu ation board provides for board creepage and clearance typical of most 2.5 kv circuit boards. it is not recommended for use above 2.5 kv rms transient voltages or for isolation voltage testing above 2500 v rms. electromagnetic interference ( emi ) and electro magnetic compatibility ( emc ) measurements the signal path was made as simple as possible while still providing flexibility. the evaluation board is not intended for detailed characterization of system noise, emi, or emc. it may be useful for initial bench work in these areas, but analog devices, inc., does not guarantee that the evaluation board results will be indicative of the final system performance in these areas. the evaluation board includes some of the structures discussed in the an - 0971 application note for radiated emi mitigation. terminals side 1 power supply inputs power is supplied to the evaluation board via a set of terminal block connectors , io_1c, as shown in figure 4 . power is connected to the pin 1 top terminal, and ground is connected to the pin 2 top ter minal. provisions for adding in - line inductors for noise isolation were made with the inclusion of z1 and z2, which are 1206 size , surface - mount components. these positions are populated with 0 resistors to connect power to the evaluation board. if ferri te inductors are required for noise control, remove these components and replaced them with appropriate inductors. 08414-002 08414-003
ug- 042 eval - adumqsebz user guide rev. c | page 4 of 8 figure 4 . side 1 terminal block connector the power and ground from the screw terminal block (if installed) are connected to the side 1 power and ground pads of the dut and provide power and ground to pull - up and pull - down resistors and terminations. the adum640x devices differ from the rest of the iso power devices in that they have an additional power supply input on pin 7 that replaces the rc out pin present on the adum5401 , adum5402 , adum5403 , and adum5404 . bypass and connect t his pin to vdd1 for proper operation of the adum640x . it is recommended that a 0.1 f capacitor be installed at r5 and a 0 w resistor at r4. the adum640x dev ices are not compatible with power sharing; therefore, do not install an adum5000 at u1 when using the adum640x . side 2 pow er supply connections the side 2 connections are different from those on side 1. with standard i coupler devices, these connections are power supply inputs for side 2. however, with iso power devices such as the adum540x , these same connections can be power outputs for off - board circuits. in addition, they can be configured as an independent power supply for the project area. figure 5 . side 2 terminal block connector power is connected to the terminal block connector (if installed) , io_1d, as shown in figure 5 . power is con nected to io_1d pin 1 at the top, and ground is connected to pin 2. provisions for adding in - line inductors for noise isolation or for isolating the jacks from the on - board power connections were made with the inclusion of z6 and z7. these positions are po pulated with 0 resistors to connect power from the adum540x to the io_1d terminal block. when standard i coupler isolators are installed, populate the z6 and z7 pads with 0 resistors to connect the power jacks to the power pins of the dut. replace these resistors with inductors if noise isolation is required. when iso power devices are installed on the evaluation board, the power configuration required can vary greatly, depending on th e demands of the application. with 0 resistors or inductors installed at z6 and z7, the power jacks can provide power from the iso power device to an external device. 08414-004 08414-005
eval - adumqsebz user guide ug- 042 rev. c | page 5 of 8 data input/output connections side 1 data input/output signals can be provided to the evaluation board and routed to the required input pins through the io_1c terminal block connector, as shown in figure 4 . four channel inputs/outputs can be connected f rom io_1c pin 3 through io_1c pin 6 to the respective a, b, c, and d channels of the adum540x. signals from the io_1c terminal block connector channels can also be routed to some of the other data lines through the jp1a and jp1b jumper blocks (these jumpe r blocks correspond to bnc channel a and channel b, if you populate them). each jumper block allows a channel signal from the io_1c terminal block to be connected to additional data input lines by configuring the jumpers. the jumper blocks can also be used to wrap signals from an i coupler output back to an input by using the jp1a or jp1b block to cross - connect inputs and outputs. a common way to provide signals is with a function generator through 50 coax cables. the evaluation board has a layout positio n at io_1a and io_1b for adding two bnc connectors , but these are not provided with the evaluation board. the tyco amp 227699 - 2 coax cables can be purchase d to populate these bnc connectors. in addition, to have 50 terminations on the evaluation board fo r the added bnc connectors, add a 50 through - hole resistor at the r1 and r2 positions. it is possible to route data outputs to this connector as well ; however, it is not recommended because proper termination is not possible for logic level signals , and improper termination can cause severe ringing on the output lines. the side 1 input/output structure also includes pull - up/pull - down/load positions, r7 through r14. discrete through - hole resistors and capacitors can be installed at these positions to simul ate most loading conditions or to provide pull - ups for open collector outputs. side 2 data i/o signals can be provided to the evaluation board and routed to the required input pins through the io_1d terminal block connector, as shown in figure 5 . it consists of terminal block connections that operate like the side 1 structures. the terminal block connections can also be used to wrap signals from an i coupler output back to an input. in addition to the off - board input/output connections, each data channel is provided with through - hole connections to the design area. design area the design area of the evaluation board allow s breadboarding of application components such as rs - 485 and controller area network ( can ) transceiver, analog - to - digital converter ( adc ), or digital - to - analog converter ( dac ) components with direct interconnects. the design area, as shown in figure 6 , accepts most surface - mount narrow - and wide - body components with 50 mil and 100 mil pitch, as well as narrow - and wide - body 300 mil dip through - hole devices. these surface - mount discrete components and jumper wires can c omplete a wide variety of circuits. the design area has convenient connection points to the primary data path, cha to chd, of the i coupler, as well as power connections for v iso and gnd iso . to allow signals from the design area to be routed to the io_1d t erminal block, remove the 0 resistors for r23 through r26 . note that no ground plane is provided in the design area. figure 6 . design area design are a chd chc chb ch a chd chc chb ch a io_1d z7 z6 gnd iso v iso 1 8 r23 r24 r25 r26 v iso 08414-006
ug- 042 eval - adumqsebz user guide rev. c | page 6 of 8 evaluation board sch ematic and layout figure 7 . schematic of adum540x evaluation board 3 2 1 p2 3 2 1 p1 3 2 1 p3 c12 c11 9 8 7 6 5 4 3 2 16 15 14 13 12 11 10 1 u2a r26 r25 r24 r23 z7 z6 1 gnd_iso3 1 gnd_iso2 1 gnd3 1 gnd2 r21 r22 6 5 4 3 2 1 io_1d 6 5 4 3 2 1 io_1c n p c10 n p c5 9 8 7 6 5 4 3 2 16 15 14 13 12 11 10 1 u1 9 8 7 6 5 4 3 2 16 15 14 13 12 11 10 1 u2 1 gnd_iso1 1 v_iso 1 tpd 1 tpc 1 tpb 1 tpa r20 r19 r18 r17 r16 r15 c8 c9 c4 c3 c1 c2 r6 r5 r4 r3 c7 c6 1 gnd1 1 vdd1 z2 z1 r1 r2 r8 r7 r9 r10 r14 r13 r12 r11 1 tp_d 1 tp_c 1 tp_b 1 tp_a 8 7 6 5 4 3 2 1 jp1b 8 7 6 5 4 3 2 1 jp1a 5 4 3 2 1 io_1a 5 4 3 2 1 io_1b gen_so16wb tbd1206 gen_qsop16 tsw-104-08-t-d tbd1206 tbd1206 .1uf .1uf tbd0805 tbd0805 dp4-1 dp3-1 vdd1 tbd0805 tbd0805 tbd0805 vdd1 tbd1206 tbd1206 tbd1206 amp227699-2 .1uf tbd1206 tsw-104-08-t-d vdd1 tbd1206 dp1-1 999394 dp2-1 v_iso gen_so16wb .1uf 999394 22uf tbd1206 tbd1206 tbd1206 tbd1206 tbd1206 .1uf .1uf 68uf tbd0805 amp227699-2 0.1uf 0.1uf tbd1206 tbd1206 v_iso tbd1206 v_iso vdd1 v_iso vdd1 agnd aplane agnd agnd agnd aplane aplane agnd agnd agnd agnd agnd agnd agnd agnd aplane aplane agnd 08414-007
eval - adumqsebz user guide ug- 042 rev. c | page 7 of 8 figure 8 . evaluation board layout 08414-008
ug- 042 eval - adumqsebz user guide rev. c | page 8 of 8 ordering information bill of materials table 1 . q uantity reference designator description supplier/part number 2 io_1c, io_1d conn - pcb terminal s weidmuller/999394 0 u1 adum5000 ; not populated n ot applicable 0 u2 supported i coupler models so16wb ; not populated not applicable 1 c10 c apacitor, tantalum, chip 68 f; not populated kemet/t495x686k020as 1 c5 c apacitor, tantalum, chip 22 f; not populated avx/tajc226k020r 2 c1, c4 c apacitors, ceramic, x5r , 10 f; not populated panasonic/ecj - 2fb0j106m 2 c2, c3 c apacitors, ceramic, x5r , 0.1 f murata/grm21br71e104ka01l 0 c6 to c9, c11, c12 c apacitors, ceramic, smd 0805; not populated not applicable 0 io_1a, io_1b conn - pcb coax bnc s ; not populated tyco amp/227699 - 2 2 jp1a, jp1b conn - pcb headers , 8 - pin double row samtec/tsw -104 -08 -t -d 17 tp_a, tp_b, tp_c, tp_d, tpa, tpb, tpc, tpd, gnd3, gnd2, gnd1, gnd_iso, gnd_iso1, gnd_iso2, gnd_iso3, vdd1, v_iso test points vector/k24a/m 2 p1, p2 jumper s fci/65474 - 001lf 0 r3 to r6, r21, r22 r esistors, chip , smd , 0805; not populated not applicable 6 r17, r23 to r26 r esistors, chip , smd , 0805 ; 0 panasonic/erj - 6gey0r00v 4 z1, z2, z6, z7 r esistors, chip , smd , 0805 ; 0 panasonic/erj - 6gey0r00v 0 r15, r16, r18 to r20 r esistors, chip , smd , 0805 ; not populated not applicable 0 r1, r2, r7 to r14 r esistors, spacer_400 ; not populated not applicable esd caution esd (electrostatic discharge) sensitive device . charged devices and circuit boards can discharge without detection. although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy esd. therefore, proper esd precautions should be taken to avo id performance degradation or loss of functionality. legal terms and cond itions by using the evaluation board discussed herein (together with any tools, components documentation or support materials, the evaluation board), you are agreeing to be bound by the terms and conditions set forth below (agreement) unless you have p urchased the evaluation board, in which case the analog devices standard terms and conditions of sale shall govern. do not us e the evaluation board until you have read and agreed to the agreement. your use of the evaluation board shall signify your accepta nce of the agreement. this agreement is made by and between you (customer) and analog devices, inc. (adi), with its principal place of business at one technology way, norwood, ma 02062, usa. subject to the terms and conditi ons of the agreement, adi he reby grants to customer a free, limited, personal, temporary, non - exclusive, non - sublicensable, non - transferable license to use the evaluation board for evaluation purposes only. customer understands and agrees that the evalu ation board is provided for the sole and exclusive purpose referenced above, and agrees not to use the evaluation board for any other purpose. furthermore, t he license granted is expressly made subject to the following additional limitations: customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the evaluation board; and (ii) permit any third party to access the evaluat ion board. as used herein, the term third party includes any entity other than adi, customer, their employees, affiliates and in - house consultants. the evaluation board is not sold to customer; all rights not expressly granted herein, including ownership of the evaluation board, are reserved by adi. confidentiality. this agreement and the evaluation board shall all be considered th e confidential and proprietary information of adi. customer may not disclose or transfer any portion of the evaluation board to any other party for any reason. upon discontinuation of use o f the evaluation board or termination of this agreement, customer a grees to promptly return the evaluation board to adi. additional restrictions. customer may not disassemble, decompile or reverse engi neer chips on the evaluation board. customer shall inform adi of any occurred damages or any modifications or alterations it makes to the evaluation board, including but not limited to soldering or any other activity that affects the material cont ent of the evaluation board. modifications to the evaluation board must comply with applicable law, including but not limited to th e rohs directive. termination. adi may terminate this agreement at any time upon giving written notice to customer. customer agrees to return to adi the evaluation board at that time. limitation of liability. the evaluation boar d provided hereunder is prov ided as is and adi makes no warranties or representations of any kind with respect to it. adi specifically disclaims any representations, endorsements, g uarantees, or warranties, express or implied, related to the evaluation board including, but not limi ted to, the implied warranty of merchantability, title, fitness for a particular purpose or noninfringement of intellectual property rights. in no event will adi and its licensors be liable for any incidental, special, indirect, or consequential dam ages re sulting from customers possession or use of the evaluation board, including but not limited to lost profits, delay costs, labor costs or loss of goodwill. adis total li ability from any and all causes shall be limited to the amount of one hundred us dolla rs ($100.00). export. customer agrees that it will not directly or indirectly export the evaluation board to another country, and that it will comply with all applicable united states federal laws and regulations relating to exports. governing law. this a greement shall be governed by and construed in accordance with the substantive laws of the commonwealth of massachusetts (excluding conflict of law rules). any legal action regarding this agreement will be heard in the state or fede ral courts having jurisd iction in suffolk county, massachusetts, and customer hereby submits to the personal jurisdiction and venue of such courts. the united nations convention on contracts for the internation al sale of goods shall not apply to this agreement and is expressly di sclaimed. ? 2010 C 2016 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. ug08414 - 0 - 11/16(c)
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